1. Field of the Disclosure
The present invention relates to virtual ground memory arrays (VGAs), and more particularly, to VGAs with enhanced separation between source/drain and word line.
2. Description of the Related Art
Virtual ground memory arrays (VGAs) are particularly useful because they are very high density with their preferred usage being in non-volatile memories. VGAs do not require field isolation but require control of both the source and drain of the memory transistors that serve as memory elements. The VGA type memory is widely applicable to the various types of non-volatile memories, such as read-only memories (“ROMs”), programmable read-only memories (“PROMs”), one-time programmable read-only memories (“OTPROMs”), flash, electrically programmable read-only memories (“EPROMs”), and electrically erasable and programmable read-only memories (“EEPROMs”). The VGA is also applicable to different storage mediums such as floating gate and nitride. One characteristic of VGAs is that the word line, which functions as the gate of the transistors for a given row of memory transistors, passes over the sources and drains. Although this is useful in achieving the high density of memory elements of VGAs, this also increases the capacitance between the word line (gate) and the drain. This is also sometimes called the Miller capacitance. The gate/drain capacitance, however, is preferably low.
One of the techniques in the past to reduce the gate/drain capacitance has been to grow an oxide layer over the sources and drains to provide increased separation between the gate and drain, thereby reducing gate/drain capacitance. While this is an effective approach for reducing the capacitance, it also introduces additional difficulties. The oxide growth has the effect of lowering the source/drains below the top surface of the silicon because the oxidation process involves using the substrate silicon in forming the oxide. This in turn causes what is known as a bird's beak similar to that found in local oxidation of silicon (“LOCOS”) type isolation. The bird's beak has the effect of increasing the gate dielectric thickness at the edge of the gate where the sources and drains are. This is difficult to control and alters the operation of the memory transistor. Another problem with the oxide growth approach is that the temperature and time for performing this growth causes additional diffusion of the source/drain regions. Also this bird's beak has not changed much as the processing and lithography technology has improved to make transistors smaller. Thus the deleterious effect of the bird's beak actually gets more significant as the technology has improved and the transistors get smaller.
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